Aart J. de Geus
Analyst · Rich Valera with Needham
Good afternoon, and thank you for joining us. Synopsys again delivered strong business, technology and customer results in Q2, meeting or beating every target we communicated last quarter. We achieved revenue of $499 million, non-GAAP earnings per share of $0.66 and considerable operating cash flow. As a result, we're raising our non-GAAP earnings per share outlook for fiscal 2013 to a range of $2.37 to $2.42, representing solid, double-digit growth for the year. We're also raising our operating cash flow target to $375 million to $400 million. Brian will provide more financial detail in just a minute. Before discussing some highlights, let me comment on the customer landscape, which I would characterize as steady. Semiconductor companies continue to face significant competitive challenges. And while cognizant of ongoing uncertainty in the macro environment, the race for differentiation and time to market, product functionality and advanced technology continues unabated. Synopsys has collaborated closely with market leaders for many years. With the high-value, but also, great technical challenges of the latest silicon technologies, more and more customer executives are sharing their future direction with us and how Synopsys is needed to get them there. As a result, we see continued successes and business strengths across key customer segments, the foundries, top IDMs and key fabless customers, particularly in mobile and cloud-related systems companies. Let me provide a couple of examples. First, during the quarter, we renewed a significant multiyear agreement with Intel. Second, we've made excellent progress with a large semiconductor company, who had been a competitor stronghold for more than a decade. For a number of years, we have worked closely with them on their most advanced designs. This quarter, with a substantial long-term commitment, they moved to Synopsys as their main partner because of our technology excellence and dedicated support. The common denominator driving the largest semiconductor and systems companies is their unrelenting demand for still faster, lower-power and broader-functionality chips. There is increasing commitment to the most advanced processes, as a growing group of customers joined the leaders in migrating to 20-nanometer, 14- and 16-nanometer and even below. The race to 3D FinFET design is very promising, as it has opened another decade of Moore's Law. Specifically, the low-power characteristics of FinFET transistors will impact end-product differentiation and is enabled by Synopsys' leading-edge design tools and IP. There's a rapidly growing set of engagements with customers designed to migrate to FinFETs. Production delivery of FinFETs designed with Synopsys tools has already passed 100 million chips. Our clear and longstanding focus on advanced technology not only positions us well for the future, but has already driven significant design and customer successes. To date, 90% of 20-nanometer and below tape-outs have used Synopsys implementation, and we're already engaged all the way down to 10 nanometers. Because of the breadth and maturity of our tools, we believe that we have at least 1 year head start over any competitor. To support this assertion, let me comment that we have been working on FinFET enablement for half a decade, and almost every FinFET design to date has relied on Synopsys. Our solution is truly comprehensive, ranging from TCADs to design tools to IP to sophisticated support. TCAD is used by foundries for simulation at the earliest stages of technology in FinFET development, giving us 6- to 12-month early access to foundry models. The resulting information feeds into the foundational technologies or HSPICE in extraction, where Synopsys tools are the gold standard. From there, our IC Compiler, which is clearly the most advanced and production-proven FinFET physical design system, creates the layout of the chips. In addition, our analog/mixed-signal designer verification tools are well ahead in terms of readiness and qualification for FinFETs. We have been engaged in developing FinFET-based IP for several years now and have production-class memory and interface IP ready to integrate into our customers' SoCs. We're engaged with 5 foundries on developing a full range of production-ready IP for them. Lastly, our IP design engineers have taped out multiple FinFET test chips for several customer processes. One example of our leadership is the announcement last week that FPGA provider, Achronix, has standardized on IC Compiler and IC Validator and has taped out the industry's first commercial FinFET-based SoC using Synopsys tools. At our Silicon Valley User Group meeting in March, more than 600 engineers attended a standing-room only FinFET panel, featuring Samsung, QUALCOMM, Cavium and GLOBALFOUNDRIES, sharing their early experiences in collaboration with Synopsys. In addition, you may recall that already in December, we announced a successful tape-out of Samsung's first 14-nanometer or low-power test chip. Samsung chose Synopsys as their FinFET partner because of a successful collaboration history and the comprehensive capabilities throughout our portfolio. Now let me turn to verification, which is the largest bottleneck in system and chip design today. Synopsys has been developing verification solutions for many, many years and is the clear leader in both leading-edge digital verification, with about 70% of advanced designs utilizing Synopsys, and circuit simulation, where 19 of the top 20 semiconductor companies rely on us. Verification is rapidly evolving, as chip complexity moves into its next phase. Two principles remain. Tool performance is key, and a complete home solution is increasingly a must. Today, our VCS simulator and ZeBu emulator both have the fastest run time in their respective categories. In combination with virtual prototyping and our FPGA-based prototyping system, we cover the entire hardware/software verification space. With the addition of the most comprehensive open debug system, Verdi, and our next-generation verification IP offering, we now address the entire verification market with outstanding tools. During the quarter, we delivered the first product's release of Verdi under Synopsys. The first is an aggressive roadmap of advanced SoC debug technology. Our integration is progressing very well, and customer reactions to our complete verification solution have been very positive. The third area I would like to highlight is IP and systems, which represents about 1/4 of our revenue and continues to see strong business. Synopsys is the second largest IP provider in the world, with 1,700 engineers designing commercial IP blocks, that give us the #1 position in interface, embedded memories and analog IP. According to Gartner, Synopsys is the largest provider of physical IP, more than double the nearest competitor. We expect this area of our business to continue to yield double-digit growth. Top 20 semiconductor vendors continue to outsource more IP to Synopsys, trusting us to deliver high-quality blocks into their critical chips. The amount of IP these companies consume has increased by 5x over the past few years and now represents almost half of our DesignWare IP revenue. This quarter, we also surpassed our 3,000th USB design win. Last year, our USB solutions shipped well in excess of 500 million units. And finally, our PCI Express solutions are well ahead of the competition. We are approaching 1,000 wins in our PCI Express family and recently passed compliance with 20-nanometer silicon. In systems, we had our strongest bookings quarter ever for FPGA-based prototyping, with broad-based demands by some of the largest semiconductor and systems companies in the world. The promise of earlier development of software, as well as robust hardware/software verification is driving continued demand for our outsourced solution. In automotive, as software content and complexity continue to grow, our customers are taking advantage of our leading virtual prototyping technology, so they can start their software development earlier and accelerate system integration, test and validation. Finally, our partnership with ARM continues to bear fruit as we released an ARM Cortex-A57-based virtual design kit, enabling our customers to create software for ARMv8-based designs up to 1 year before silicon is available. In summary, as we reach the halfway point of the fiscal year, Synopsys continues to execute very well. Demand for technology is strong, customer momentum continues, and we again delivered very solid financial results. Consequently, we are raising our non-GAAP earnings per share and operating cash flow guidance for the year. I'll now turn the call over to Brian Beattie.